History teaches us that any new hardware without good and widely-used software on top has no future. Countless examples exist even from the biggest manufacturers (e.g. Intel Itanium, IBM Cell, ...) without even considering competition (e.g Sun Microsystems's Ultrasparcs, Digital's Alphas, HP's ...). Regardless of the nostalgia and to ensure RISC-V is successful beyond small controllers, software and -specially- widely used software suites require the focus now to avoid repeating the errors of the past.

This workshop is born to bring together all the researchers and developers in the open-source software arena to showcase their developments and stablish collaborations. This community can provide efficiently and effectively the necessary software in the different application areas where RISC-V can be deployed.

This workshop focuses on software. From hardware simulators/emulators, through OSes/toolchains, to applications and software stacks. A special focus will be devoted to open-source and collaborative projects.

PROGRAM:

Morning:

• 09:00 - 9:45 KEYNOTE 1: Philipp Tomsich (Chair of the RISC-V Software Committee and Vice-Chair of the RISC-V Technical Steering Committee)

• 9:45 - 10:00 Lightning talks of afternoon presentations.

• 10:00 - 10:30 Empowering RISC-V with Ubuntu (Heinrich Schuchardt, RISC-V Lead Engineer at Canonical) (slides)

Abstract: Canonical has enabled and optimised Ubuntu for a multitude of RISC-V hardware platforms offering secure and reliable access to open source tools for developers and end users. Engagement with partners is at the heart of continuing this story. The rapid development of the ISA poses the next challenge we are tackling. 

Bio: Heinrich is working as RISC-V lead engineer in Canonical’s foundations team. He has contributed to a wide range of open source projects reaching from linear programming to the Linux kernel. He is maintainer of the UEFI sub-system in the U-Boot firmware. 

Coffee break

• 11:30 - 12:00 Open source activities on RISC-V. (Matthias Brugger, Hardware Enablement at SUSE) (slides)

Abstract: SUSE and openSUSE support a wide range of architectures. In this talk we will dive into the activites that are done in SUSE and openSUSE around Risc-V. What is the state of the distribution regarding the support of Risc-V and what problems were encountered on the way.

Bio: Matthias is year long kernel engineer with experience ranging from embedded boards up to server environments. These days he is leading the Hardware Enablement Team at SUSE.

• 12:00 - 12:30 oneAPI Construction Kit: Enabling SYCL and OpenCL support for RISC-V (Uwe Dolinsky, Codeplay) (slides)

Abstract: The open-source oneAPI Construction Kit enables support for open software acceleration standards like OpenCL and SYCL on various platforms, enabling them to take advantage of a large and fast-growing standards-based open software ecosystem for accelerating HPC, AI and other applications. This presentation introduces the toolkit, the current status and capabilities, and shows how it is used to enable OpenCL and SYCL on RISC-V. 

Bio: Uwe leads various research activities at Codeplay to accelerate standards-based software on new hardware platforms through new compiler and runtime technologies. 

Lunch

Afternoon:

• 13:40 - 14:00 KEYNOTE 2: 3C and Digital Sovereignty in the Cloud/Edge Continuum (Luís Busquets, CNECT EU) (slides)

Abstract: Under Horizon Europe WP 2021-22, the EU has funded the integration of new ISAs into cloud infrastructures. HE WP 2023-24 extended that integration to edge computing. What comes next? What are the investment plans for the future and how RISC-V efforts can contribute to the 3C? The presentation will try to share some light on what are the main relevant initiatives for the future and how ongoing efforts can contribute to freedom and Digital Autonomy.

Bio: Programme Officer, DG CONNECT, European Commission: Luis C. Busquets Pérez holds a degree in telecommunications engineering (UPC, Barcelona) and a Master in Business Administration (ESADE, Barcelona). For more than 20 years, his professional career has been developed in the ICT sector covering all OSI layers (from fibre optics and semiconductors to IT applications). Previous to his career in the European institutions, he held several positions in marketing and sales for ICT Fortune 500 companies. In 2006, he joined the European Commission services and is currently Programme Officer in DG CONNECT E2, which is the Cloud and Software unit.

• 14:00 - 14:40 KEYNOTE 3: RISE at One Year – Great Progress With Much More To Come (Larry Wikelius, RISE Governing Board Member & Treasurer) (slides)

Abstract: RISE (RISC-V Software Ecosystem) launched on May 31 last year with 13 initial members.  Since this launch RISE has had tremendous growth in membership as well as in impact to the overall RISC-v Software Ecosystem.  This keynote presentation will provide an update on RISE, highlight key contributions to RISC-V open-source communities, address additional impact areas RISE is investing in and discuss future plans.

Bio: I represent Qualcomm as a Governing Board member of RISE and serve as Treasurer.  I am a Senior Director in the Qualcomm Standards and Industry Organization (QSIO) and currently lead Qualcomm’s engagements related to RISC-V software.  Over my career I have been active in many industry organizations spanning both Arm and RISC-V and have lead software engineering teams at a range of server and silicon companies.  I have a B.S. in Computer Science from the University of Minnesota and an MBA from Northeastern University in Boston.

• 14:40 - 15:10

  • MAMBO: Dynamic Binary Instrumentation on RISC-V (Alistair Kressel, Igor Wodiany, Mikel Luján, University of Manchester)  (slides)

Abstract: MAMBO is the first dynamic binary modification (DBM) framework optimized for 64-bit RISC-V (RV64GC) and Arm. DBM systems allow developers to inspect, instrument and even modify running binaries (for example to detect memory issues or trace executed instructions) by sitting in-between the operating system and user application. Examples of those frameworks include Intel PIN, DynamoRIO and MAMBO - subject of this talk. This talk presents MAMBO and discusses how it can help researchers and developers in implementing efficient dynamic binary analysis and instrumentation tools. The presentation describes MAMBO, its key features and strengths, and the plugin infrastructure used by developers. We also cover some lessons learned from porting our software to RISC-V.

Bio(s): Igor Wodiany is a PhD student and research assistant in the Advanced Processor Technology (APT) group at the University of Manchester. He earned his B.Sc. in computer science from the same institution and previously worked at Intel and Five AI. His interests include binary analysis, compilers and software security. Igor is one of the maintainers of MAMBO and uses the project in his day-to-day research.

John Alistair Kressel is a PhD student and research assistant in the Advanced Processor Technology (APT) group at the University of Manchester. He recently completed his MPhil researching software compartmentalization using CHERI hardware capabilities. His interests include software security, OSes and binary modification. He is one of the developers of MAMBO on RISC-V.

• • Experiences with NOMMU Linux for RISC-V platform bring-up and validation (Nick Kossifidis, Manolis Marazakis, FORTH) (slides)

Abstract: The RISER project aims to build accelerator and microserver systems based on RISC-V SoCs from ongoing European projects funded by the EuroHPC JU. Working with experimental hardware platforms requires substantial effort on verification and bring-up, including bare-metal tests aimed at the core, memory, and platform levels. Booting a full-blown Linux distribution greatly expands test coverage but also complexity. We recommend starting with a bare-minimum kernel configuration, without networking and storage functions, and even opting for a no-MMU system configuration, to progressively expand test coverage. In this talk, we outline the features and limitations of no-MMU and summarize our practical experience in early-stage verification of RISC-V prototype platforms.

Bio: Manolis Marazakis is a staff research scientist at the Institute of Computer science, FORTH (Greece). His research interests are in architectures and efficient systems software for high-performance servers in data center environments. He is the coordinator of the RISER project (https://riser-project.eu).

Coffee break

• 15:30 - 17:00

  • Platform-agnostic performance profiling with AdaptivePerf (Maksymilian Graczyk, CERN) (slides)

Abstract: TAdaptivePerf is an open-source profiling tool originally built on top of the custom-patched Linux "perf". Its development started last year at CERN as the result of no reliable platform-agnostic and low-overhead code profiler that could be used in high-energy physics and other use cases within SYCLOPS (an EU-funded project about hardware acceleration with open standards using SYCL and RISC-V). By running one simple command, the tool samples both on-CPU and off-CPU activity of a given program along with tracing every spawned thread/process, making it a suitable choice for both single-threaded and multi-threaded applications. Additionally, depending on the available performance counters supported by "perf", AdaptivePerf can profile low-level software-hardware interactions such as cache misses. The results of profiling can then be rendered as interactive non-time-ordered and time-ordered flame graphs in a web browser. The main functionality of AdaptivePerf is designed with hardware portability in mind. The program has already been tested on x86-64 and RISC-V, with arm64 being planned. This talk presents the tool and it explain thoroughly how it works under the hood, and discuss the current status of AdaptivePerf support of RISC-V. I will also briefly mention the future development plans, which include adding support of non-CPU/heterogeneous architectures.

Bio: Maksymilian Graczyk joined CERN as a junior performance research engineer in April 2023 as part of the EU-funded SYCLOPS project. His job concentrates on benchmarking and profiling high-energy physics software and beyond in the context of open-standard heterogeneous computing and RISC-V.M Before coming to CERN, he graduated with an integrated Master's degree in computing / computer science from Imperial College London. His main interests are computer architecture, general- and special-purpose processors, compilers, hardware accelerators, and everything else at the software-hardware boundary. Additionally, he is keen on using these areas for helping advance physics research.

• • Enabling an OpenStack-based cloud on top of RISC-V hardware (Aaron Call, BSC)  (slides)

Abstract: The European Union’s technological sovereignty strategy centers around the RISC-V Instruction Set Architecture, with the European Processor Initiative leading efforts to build production-ready processors. Focusing on realizing a functional RISC-V cloud ecosystem, the Vitamin-V European project developed an OpenStack cluster utilizing genuine hardware. In this presentation, we detail the efforts done in porting and setting up the cluster and the many software services required by OpenStack to properly run on real hardware. We detail our efforts building an minimal viable prototype OpenStack cluster using real hardware. The cluster is almost functional, and we expect it to be complete in the next months.

Bio: Aaron Call received the B.S. and Ph.D. degrees from the BarcelonaTech-Universitat  Politècnica de Catalunya (UPC), in 2014 and 2022, respectively. He is currently a researcher within the Data-Centric Computing, Barcelona Supercomputing Center. On winter 2019 he was a research intern at Intel Labs on Portland, Oregon where he studied performance bottlenecks at a micro architecture level. His research evolves around resource management for disaggregated resources on  heterogeneous environments. His research also include cloud/edge continuum. He is currently work package leader of the VItamin-V, where they are porting a cloud software stack to RISC-V. He is also leading a work package in the NEARDATA project, where they are exploring how to process exa-scale data volumes for omics use-cases within the cloud continuum and researching on potential benefits when combining cloud and HPC environments. 

• • Rust-vmm: RISC-V porting experience  (Samuele Paone, Virtual Open Systems) (slides)

Abstract: The open-source communities have quickly realised the importance of having RISC-V virtualization solutions which could welcome all the upcoming virtualization-enabled hardware. One of the outstanding projects in this regard is rust-vmm, a suite of tools and libraries to implement a system virtualizer.

This presentation aims to provide an overview of Virtual Open Systems experience in porting some of the Rust-vmm crates to RISC-V.  The talk will

give the audience an overview on the main components of the projects, their relationships, and where Virtual Open Systems made its main contributions. A

special focus will be given to technical aspects concerning interrupts and device emulation, which have been decisive to properly running a Linux guest.

This effort is part of the Horizon Europe project Vitamin-V action, which aims at designing and developing a fully virtualized platform and related software

and hardware technologies for an early adoption of the architecture, before the hardware is available.

Bio: Samuele Paone is a computer engineer who obtained a master's degree in Computer Engineering from the Politecnico di Torino in April 2023, with a thesis titled "Flexible Device Pass-Through Solution for Embedded Systems." Since September 2022, he has been working as a Computer Engineer at Virtual Open Systems. He has participated in European projects funded by the H2020 research fund, which have allowed him to work with FPGA technology, specifically on a virtualization framework for FPGAs. These projects also introduced him to the world of RISC-V, where he contributed to porting RUST-VMM and Vmm-reference to RISC-V.

• • Building, running and testing Kubernetes on RISC-V (Francesco Lubrano, LINKS Foundation) (slides)

Abstract: Francesco Lubrano will present the work and advancements done within Vitamin-V project related to Kubernetes. Vitamin-V targets to build a complete RISC-V open-source software stack for cloud services and a virtual execution environment for software development, validation, verification, and test. On top of QEMU, LINKS deployed a Kubernetes cluster and a set of monitoring tools and started to work on sample containerized applications. We demonstrated that we can build Kubernetes from source directly on RISC-V simulated platform, paving the way for the next Vitamin activities concerning tests, benchmarking and demonstrations.

Bio: Francesco Lubrano is a senior researcher at Advanced Computing, Photonics and Electromagnetics Research Domain (CPE) in LINKS Foundation. He held a MSc degree in Computer Engineering. In 2017 he started his collaboration with LINKS Foundation, focusing on HPC, Cloud Computing and Computing Continuum research domains.

• • Confidential Computing for RISC-V: Status and Outlook (Nick Kossifidis, FORTH) (slides)

Abstract: Getting confidential computing right is a tough challenge. Other architectures already tried in the past to introduce mechanisms for providing confidentiality guarantees, and in many cases failed. On RISC-V the Confidential Computing SIG, under the Security HC, is working on two specifications for providing confidentiality guarantees for VMs/TEEs and devices (AP-TEE/AP-TEE-IO), for application-class processors. In this presentation we'll go through those mechanisms and give an overview of the provided guarantees and use cases in mind.

Bio: Nick Kossifidis is a principal research engineer at the Institute of Computer Science of FORTH (Greece), currently working on the bringup, validation, and optimization process of various RISC-V prototypes. He is the Chair of the RISC-V Runtime Integrity SIG and has multiple contributions in open source projects, including various subsystems of the Linux kernel. 

Organizers:

Ramon Canal, Beatriz Otero, Josep-Lluís Berral (UPC)

Stefano Di Carlo (POLITO)

Manolis Marazakis (FORTH)

Program Committee:

Dimitris Gizopoulos (UoA)

Juan José Costa (UPC)

Aaron Call (BSC)

Manolis Marazakis (FORTH)